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As a RTL Integration (Frontend) Engineer at EdgeCortix, you will be responsible for integrating IP into ASSP/SOC and other third-party IP, as well as playing a key role in verification infrastructure development, automation, and improvement.
Develop, improve, and execute test cases and test automation for qualifying software releases and AI/ML IP. Troubleshoot software/hardware/infrastructure issues, collaborate with other teams, and maintain QA infrastructure. Minimum qualifications include 5-10 years of testing experience, proficiency in Python, exposure to embedded software/hardware testing, and familiarity with Linux, Docker, Kubernetes, Git, Jenkins, Groovy.
The Physical Silicon Design Engineer will work on implementing and optimizing physical designs for SoCs and AI acceleration products at Edgecortix Inc. Responsibilities include power analysis, synthesis, timing closure, and staying up-to-date with industry trends.
Join Edgecortix as a Design Verification Engineer and work on AI hardware verification infrastructure, testbench automation, and power-aware verification. Ideal for individuals with 6-7 years of experience in functional verification using SystemVerilog/UVM.
Seeking a Senior ASIC Implementation Engineer with 4+ years of experience to handle key ASIC implementation tasks including synthesis, timing constraints, power analysis, and participate in physical design activities. Responsibilities also include RTL development and crossdisciplinary problem-solving.
ASIC Program Manager responsible for driving chip roadmap programs, program execution in terms of schedule, performance, power, cost, and quality, risk identification and mitigation, overseeing change control, and communicating with senior management and stakeholders.
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