Top Design Engineer Jobs in Hyderabad

Develop and implement SoCs, including micro-architecture design and RTL coding. Collaborate across teams and support chip development and validation processes.

Develop and implement SoCs designs including micro-architecture, RTL coding, validation, and collaboration with various teams throughout the ASIC development.

The Principal Design Engineer at Cadence will develop test plans and verification infrastructure for complex IPs and SoCs, create verification environments using UVM methodology, and drive verification closure. The role requires collaboration with architects and designers to ensure functional correctness and coverage, alongside the management of test bench creation and execution for various protocols.

The Principal Physical Design Engineer will collaborate with design teams to translate requirements into physical implementations, execute design tasks such as floor planning and timing analysis, and enhance design quality through automation. The role involves using industry-standard tools and requires strong experience in digital backend design and layout principles.

The Staff/Principal Mask Design Engineer at Micron Technology will focus on quality NAND Memory Design through Custom Layout Design and Tapeout Management. Responsibilities include driving layout edits for development and yield improvement, managing design libraries, and supporting the tapeout process by coordinating with engineering and manufacturing teams to meet project schedules.

The Analog Design Engineer will lead the development of new DRAM and memory products, focusing on design, verification, and optimization of analog circuits. Responsibilities include supporting validation processes, coordinating with various engineering groups, and ensuring manufacturability through collaboration and innovative solutions.

The Lead Design Engineer will develop and integrate foundry rule decks to support PDKs, handle PDK QA and verification, automate verification flows using scripts, provide tool usage support, and interface with design and foundry teams. Responsibilities include maintaining an automation framework, implementing design rules, and ensuring QA of integrated PDKs.

The Senior Design Engineer will focus on the design and verification of NAND internal operations, contributing to firmware qualification using System Verilog coding and simulation. Responsibilities include developing new product opportunities, optimizing memory and logic circuits, and collaborating across groups for successful innovation in memory design.