Responsible for defining and implementing hardware architectures for AI SoC solutions, developing RTL components, and collaborating on physical design for performance optimization.
- We are seeking highly motivated ASIC Design Hardware Engineers to join our cutting-edge hardware team focused on developing System-on-Chip (SoC) solutions for AI inference workloads, including Convolutional Neural Networks (CNNs) and Large Language Models (LLMs). This is an exciting opportunity for new graduates to work on next-generation AI accelerators and contribute to the entire chip development lifecycle.
- Architecture & Microarchitecture Design:
Define and Implement hardware architectures optimized for AI inference acceleration - RTL Design & Integration:
Develop and integrate Register Transfer Level (RTL) components for SoCs using industry-standard HDLs (Verilog/SystemVerilog). - Physical Design Support:
Collaborate with physical design teams on synthesis, timing closure, and power optimization. - System Engineering & Performance Analysis:
Work with system engineers to model workloads, analyze performance bottlenecks, and validate AI inference use cases. - Performance & Power modelling
More information about NXP in India...
#LI-2734Top Skills
Asic Design
Convolutional Neural Networks
Large Language Models
Rtl
Soc
Systemverilog
Verilog
NXP Semiconductors Gachibowli, Telangana, IND Office
1st Floor, Block 3 , DLF Cyber City Plot # 129-132, APHB Colony, Gachibowli, Telangana, India, 500019
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