Senior Hardware Verification Engineer

Job Summary
NXP Semiconductors is seeking a highly skilled and experienced Senior Hardware Verification Engineer to join our team. In this role, you will be responsible for the comprehensive verification of complex digital hardware designs, ensuring their functional correctness, performance, and adherence to specifications for cutting-edge semiconductor products.
Job Responsibilities
* Develop and implement advanced verification strategies and methodologies for complex SoC and IP designs.
* Create detailed verification plans based on architecture specifications and functional requirements.
* Design and develop robust, reusable, and self-checking testbenches and verification environments using industry-standard methodologies (e.g., UVM, Specman).
* Write, execute, and debug directed and constrained-random tests to achieve high functional and code coverage.
* Develop and implement assertions (e.g., SVA) to monitor design behavior and detect errors.
* Analyze functional and code coverage metrics, identify gaps, and drive strategies for achieving target coverage goals.
* Collaborate closely with design, architecture, and software teams to understand design intent and resolve verification issues.
* Debug complex hardware issues using waveform viewers and other debug tools.
* Perform formal verification, linting, and other static verification techniques as needed.
* Contribute to the continuous improvement of verification methodologies, flows, and tools.
* Mentor junior engineers and provide technical leadership within the verification team.
* Document verification progress, results, and issues clearly and concisely.
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Job Qualifications
* Master's degree in Electrical Engineering, Computer Engineering, or a related field.
* 5+ years of hands-on experience in digital ASIC/FPGA verification.
* Expertise in industry-standard hardware verification languages (SystemVerilog, Verilog, VHDL).
* Strong proficiency in verification methodologies such as UVM (Universal Verification Methodology) is essential.
* Experience with constrained-random verification, coverage-driven verification, and assertion-based verification.
* Familiarity with scripting languages (e.g., Python, Perl, Tcl) for test automation and data analysis.
* Proficiency with simulation tools (e.g., QuestaSim, VCS, Incisive) and debug environments.
* Solid understanding of digital design principles, computer architecture, and SoC/IP integration.
* Experience with formal verification techniques and tools is a plus.
* Excellent problem-solving skills and a strong attention to detail.
* Ability to work effectively in a collaborative team environment and communicate complex technical concepts clearly.
* Demonstrated ability to lead technical initiatives and mentor junior engineers.
* Fluency in English (both written and spoken).

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